A Tutorial and Survey on Thermal-Aware VLSI Design: Tools and Techniques
نویسنده
چکیده
-The strongest challenge that a VLSI designer has to face today is the extremely high heat generation within a chip which not only degrades the performance but also the yield and reliability are greatly affected. The situation even became worse with the evolution of multi-core processors with billions of devices in a single chip and due to die-to-die temperature variations within the chip. This paper surveys the state-of-the art design methodologies, tools and techniques to estimate and minimize the heat dissipation within a chip. It emphasizes the thermal problems especially at the layout (including floorplanning, placement, routing, and clock distribution) level. The goal of the paper is to focus on the ongoing research in the field of thermal balanced design for nanometer ICs and to aware the challenges that are to be taken by the future VLSI
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